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Creation: August 18 2017
Modified: February 05 2022

RS-232 Serial

Serial line usually identifies hardware more or less compliant to the RS-232 standard.

RS-232 formally defines the signals connecting between a DTE (Data Terminal Equipment), such as a computer terminal, and a DCE (Data Circuit Equipment), such as a modem. Such a standard is commonly used in computer serial ports.

The standard defines the electrical characteristics and timing of signals, the meaning of signals, and the physical size and pinout of connectors.

The standard does not define character encoding, framing of characters, error detection protocols, bit rates. The character format and transmission bit rate are set by the serial port hardware.

Each data or control circuit only operates in one direction, from the DTE to the attached DCE or the reverse. Because the tx and rx of data are separated, the interface can operate in a full duplex manner.

Both synchronous and asynchronous transmissions are supported by the standard.

Voltage Levels

Valid signals are either in the range of +3 to +15 volts or the range -3 to -15 volts with respect to the GND pin. For data transmission lines (TxD, RxD), logic one is defined as a negative voltage, the signal condition is called mark. Logic zero is positive and is called space.

Control signals (e.g. RTS, CTS, DTR, DSR) have opposite polarity: active state is positive voltage.

Data and control signals

Commonly used RS-232 signals.


According to the standard, male connectors have DTE pin functions, while female connectors have DCE pin functions. The standard recomends the 25-pin connector but many manufacturers replaced it with a smaller and less expensive 9-pin connector.

Minimal serial

A minimal 3-wire RS-232 connection consists of the TxD, RxD and GND wires. It is commonly used when the full facilities of the protocol are not required. Even a 2-wire connection (data and ground) can be used if the data flow is one way.

When hardware flow control is also required the RTS and CTS lines are added in a 5-wire version.

Hardware flow control

RTS and CTS signals were originally defined for use with half-duplex modems that disables their transmitters when not required. The DTE asserts RTS to indicate a desire to transmit to the DCE, in response the DCE asserts the CTS to grant permission. Such modems are no longer in common use. In older versions of the standard there is no corresponding signal that the DTE could use to temporary halt incoming data from the DCE.

In 1980 the RTR signal was introduced. The DTE asserts RTR whenever it is ready to receive from the DCE, and the DCE asserts CTS whenever it is ready to receive data from the DTE.

Synchronous vs Asynchronous

If the receiver and the sender share a common system clock they are said to operate in synchronous mode, whereas if they have separate clocks (of identical frequency) they must operate in asynchrounous mode.

In async mode the sender inserts a pseudo-clock pulse, known as the start bit, in front of each transmitted byte. So each ASCII char is dealt with as an independent transmission with start, stop and parity bits appended. The line speed is set manually before the session begins.

In synchronous mode bits are transmitted without start ans stop bits. To provide the receiver to sync on the data, the message block is preceded by a special 'Sync' characters which are detectable by the receiver hardware. They are also transmitted continuously by the transmitter units when there is no data available.

Synchronous transmission can use clever modulation schemes to transfer data and clock information along the same pair of wires (e.g. Manchester).

Two timing signals are provided by the DCE on pins 15 and 17. Pin 15 is the transmitter clock, or sender timing (ST), Pin 17 is the receiver clock, or receiver timing (RT).

Alternatively, the DTE can provide a clock signal, called transmitter timing (TT), on pin 24 for transmitted data.

Synchronous clocking is required for such protocols as SDLC, HDLC, and X.25.


Universal Asynchronous Receiver/Transceiver (UART) is a chip that implements the protocol that picks a byte and sends it bit per bit over an asynchronous serial line and vice versa.

The Serial Controller (UART) has an internal clock which runs at 115200 ticks per second and a clock divisor used to control the baud rate.


A frame is a set of bits that are transmitted sequentially by the transmitter. A frame consists of four types of bits: a start bit, data bits, parity bit, and stop bits.

Start bit

Both transmitter and receiver assume that the channel is initially idle (i.e. zero volt logical level). The beginning of a frame is then signaled by setting the channel high for a specified length of time.

Data bits

The number of bits in a character is variable. Having fewer bits is faster but they store less information. If we need to send ASCII text only, then only 7 bits are strictly required.

Parity bit

The controller can be made to add or expect a parity bit at the end of each character of data transmitted. If a single bit of data is inverted by interference, a parity error can be raised. The parity can be NONE, EVEN, ODD, MARK or SPACE.

If the parity is MARK or SPACE, the parity bit will be expected to be always set to 1 or 0 respectively.

Stop bits

The serial controller can be configured to send a number of bits (1 or 2) after each character of data. These reliable bits can be used by the controller to verify that the sending and receiving devices are in phase.

It is required so that there is always a transition at the leading edge of the start bit. Otherwise, if the last data bit of the previous character happened to be of the same polarity as a start bit, the receiver wouldn't be able to see the start bit if a new character was sent immediately.

The stop bit is essentially enforced line idle time between characters. That time is also used to absorb some clock mismatch between the sender and receiver.

After the last data bit is received, the receiver waits for the line to go back to the idle state, then waits for the next start bit again.

Baud Rate

It is the speed at which the serial line switch between it's two states. This is not equivalent to the bits per second, due to the presence of start stop and parity bits.

For example, on a 8N1 line (8 data bits, no parity, one stop bit), 10 bauds are equal to 8 bits-per-second of payload data. Thus 9600 baud are equivalent to 9600*8/10 = 7680 bps (of payload data).

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